The present invention relates to a photomask for a semiconductor device, and more particularly, to an extreme ultra violet lithography mask and a method for fabricating the same.
As a degree of integration of a semiconductor device is increased and a design rule is reduced, a pattern size required in the device has rapidly decreased. This has driven photolithography equipment to use shorter and shorter wavelengths of light in the exposure process to get smaller feature sizes. However, the wavelength of light and an aperture number (NA) of the exposure apparatus shows a limitation. Accordingly, resolution enhancement technologies (RET), for example an immersion lithography, a double patterning technology, an extreme ultra violet (EUV) lithography, etc. have been suggested to overcome the resolution limit.
Particularly, to form a pattern having a critical dimension of less than 32 nm, a study for developing the extreme ultra violet lithography using an extreme ultra violet of 13.5 nm that is shorter than a wavelength of KrF or ArF has been continued. The EUV lithography process uses a mask comprising a reflective layer with a pattern on it (i.e., an extreme ultra violet mask). An EUV light is projected onto the mask and then the pattern on the mask is transferred onto a wafer. An extreme ultra violet mask has a light reflective structure, for example, a reflective layer including a multi-layer of a molybdenum (Mo) layer and a silicon (Si) layer. An EUV mask also has a capping layer, a buffer layer pattern and an absorption layer pattern formed on top of the light reflective structure. When the EUV light is irradiated onto the EUV mask, the light is absorbed by the absorption layer pattern (i.e., mask pattern) and reflected by a surface of the reflective layer exposed by the absorption layer pattern.
However, the EUV light irradiated onto the EUV mask is irradiated or reflected at an inclined incidence angle, e.g. an angle of 5 to 6° from perpendicular to the surface. With this angle a shadow may be exhibited due to a height difference between an upper surface of the absorption layer pattern and a surface of the reflective layer. This shadow effect can change the critical dimension of a wafer pattern.